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GENERAL INFO
THE SYMPOSIUM
PRACTICAL INFO
PROGRAM
SUBMISSIONS
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VTS - Apr 27th - May 1st, 2008 |
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The IEEE VLSI Test Symposium (VTS) explores emerging trends and novel concepts in testing, and verification / validation of microelectronic circuits and systems.
The VTS Program Committee invites original, unpublished paper submissions for VTS 2008. Paper submissions should be complete manuscripts, up to eight pages (inclusive of figures, tables, and bibliography) in a standard IEEE two-column format; papers exceeding the page limit will be returned without review. Authors should clearly explain the significance of the work, highlight novel features, and describe its current status.
Technical Paper Submissions
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General Information
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PROGRAM CO-CHAIRS
Peter Maxwell
Micron Technology
3080 North 1st Street, MS 65-300
San Jose, CA 95134, USA
T: +1 408 660 2420
F: +1 408 660 2339
E: pmaxwell@micron.com
Cecilia Metra
ARCES - University of Bologna
Viale Risorgimento 2
40136 Bologna, Italy
T: + 39 051 209 3038
F: + 39 051 209 3073
E: cmetra@deis.unibo.it
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GENERAL CHAIR
Alex Orailoglu
University of California, San Diego
Dept. of Computer Science and Engg.
9500 Gilman Drive, Mail Code 0404
La Jolla, CA 92093-0404, USA
T: +1-858-534-0914
F: +1-858-534-7029
E: alex@cs.ucsd.edu
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VTS Topics |
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Major topics include, but are not limited to:
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Analog, M-S & RF Test
Automatic Test Generation
ATE Architecture & SW
Board & System Test
Built-In Self-Test (BIST)
Current Based Test
Defect Tolerance
Delay & Performance Test
Design for Testability (DFT)
Design Verification/Validation
Diagnosis and Debug
Embedded System Test
Embedded Test Methods
Fault Modeling and Simulation
Infrastructure IP
MEMS Test
Memory Test and Repair
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Microprocessor Test
Multi-Chip Module Test
Nanometer Technologies Test
On-Line Test
Power Issues in Test
Self-Repair & Fault Tolerance
System-on-Chip (SOC) Test
System-in-Package Test
Test Resource Partitioning
Thermal Test
Test Data Compression
Test of High-Speed I/O
Test Quality and Reliability
Test Resource Partitioning
Transients and Soft Errors
Yield Analysis & Optimization
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 HOTEL DEADLINE
Hotel deadline extended to April 8. Due to the popularity of VTS2008, the on-line reservation system may not be able to
reserve rooms at VTS discounted rate for certain dates during your VTS stay.
Please call +1-800-542-6096 referencing IEEE (VLSI Test Symposium) to make your reservation.
NEWSLETTER
Here you can find the last VTS newsletter.
TECHNICAL PROGRAM
The technical program (including abstracts of Special and IP sessions) is now available here.
Read more about new and hot topic sessions...
SOCIAL EVENT
Bring your passport!!.
Read more...
DEADLINES
Abstract: Oct. 29th '07
Submission: Nov. 5th '07
Notification: Dec. 21st '07
IP Tracks: Dec. 31st '07
Special Ses.: Dec. 31st '07
Thesis Aw.: Mar. 7th, 08
Res. Poster: Mar. 7th, 08
Hotel Disc.: Apr. 7th, 08
Early Reg.: Apr. 11th, 08
LOCATION
VTS will take place from Apr 27th to May 1st, 2008, in San Diego, California, USA More...
Graduate Student Activities
Ph.D. students graduating in 2008 are invited to participate to the Doctoral Thesis Award Contest.
All other graduate students (Ph.D. or M.S.) working on a test-related thesis are invited to participate
to the Thesis Research Poster Session.
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CONTACTS & FEEDBACK
For any questions you can contact the
VTS Office,
the General Chair or the
Program Chairs.
Moreover, The VTS Organizing Committee is interested in providing a rich
historical view of VTS. Please send information you believe to be relevant
to the historian.
For questions related to this website, please contact the
Webmaster
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