The TTTC Student Activities Committee is organizing two activities aiming to provide graduate students
with an opportunity to disseminate their research and obtain visibility in the international test community.
More...
VLSI Test Symposium 2010 includes two excellent TTEP 2010 tutorials on high interest
test technology topic. The tutorials qualify for IEEE TTTC certification. The tutorials will be presented on
on Thursday, April 22nd (8:30am-4:40pm). The tutorials require a separate fee and registration
(see General Information).
Tutorial 1: Thursday, April 22nd
8:30 am - 4:40 pm Practices in Analog, Mixed-signal and RF Testing
PRESENTERS: SALEM ABDENNADHER (Intel), SAGHIR A. SHΑIKH (Broadcom)
AUDIENCE:
This tutorial is most suitable for design, test and DFT engineers involved in actual implementation of mixed-signal, analog, RF and wireless devices and systems. The architects and engineering managers would also greatly benefit from this tutorial
DESCRIPTION:
The objective of this course is to present existing industry ATE solutions and the alternative solutions to ATE testing for mixed-signal and RF SoCs. These techniques greatly rely upon DFT and BIST structures. Tutorial presents the basic concepts in analog and RF measurements (eye diagram, jitter, gain, power compression, harmonics, noise figure, phase noise, BER, EVM, etc.). Several industrial examples of production testing of mixed-signal and RF devices, such as, SERDES transceivers, PHYs, PMDs, and RF transceivers are also presented. The block-DFT solutions are presented for PLLs, delta-sigma converters, equalizers, filters, mixers, AGC, LNAs, DACs and ADCs. The testing of high speed IO interfaces, such as, PCI-Express, and XAUI, etc, and the new design trends in RF systems such as MIMO and SiP based systems and their testability are also presented in this tutorial.
Tutorial 2: Thursday, April 22nd
8:30 am - 4:40 pm Parameter Variations and Low-Power Design: Test Issues and On-chip Calibration/Repair Solutions
PRESENTERS: RAHUL RAO (IBM Research), SAIBAL MUKHOPADYAY (Georgia Institute of Technology), SWARUP BHUNIA (Case Western Reserve University), PRAVEEN ELAKKUMANAN (IBM)
AUDIENCE:
This tutorial is targeted towards test and design engineers, tool developers, researchers and students interested in variability and automated characterization and compensation approaches for reliability and power management and yield improvement
DESCRIPTION:
Variations in device and interconnection characteristics resulting from process imperfections, environmental, (e.g. temperature, voltage), temporal (e.g. NBTI, HCI, TDDB) and workload effects degrade the parametric yield and systems robustness. Such variations result in increased test cost and reduced yield due to test challenges due to new failure mechanisms and increased parametric failure rate. Low-power design techniques such as voltage scaling, body biasing and dual-Vth further aggravate these issues. Post-manufacturing approaches for on-chip calibration and self-repair of degraded systems constitute a promising class of solutions to improve the parametric yield through pro-active delay compensation and enhanced power management. To provide a comprehensive coverage on parameter variations and its impact on test, this tutorial will focus on: 1) intrinsic device physics and process limitations that cause variations; 2) design and test issues associated with parameter variations; 3) impact on yield and reliability; 3) test issues for low-power designs under variations; and 4) on-chip calibration and repair schemes for logic, memory and mixed-signal circuits to improve parametric yield and reliability. On-chip monitoring systems for self-calibration and in-field predictive diagnosis will be presented. Design and test approaches that address within-die parameter variations will be discussed with emphasis on power management. Finally, the tutorial will discuss online adaptation techniques for reliability improvement under temperature fluctuations and device degradations.
Moreover, The VTS Organizing Committee is interested in providing a rich
historical view of VTS. Please send information you believe to be relevant
to the historian.
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