TTTC’s E. J. McCluskey Best Doctoral Thesis 2020 VT Semifinals winner.
After watching the student’s presentations and “virtually” meeting with them to ask questions the jury composed of:
- Vivek Chickermane (Cadence)
- Adit Singh (Auburn University)
- Sohrab Aftabjahani (Intel Corp.)
has decreed that the top three students are:
- Mohammad Nasim Imtiaz Khan, Penn. State Univ.
- Georgios Volanis, Univ. Texas at Dallas
- Gaurav Rajavendra Reddy, Univ. Texas at Dallas
Congratulations to Mohammad Nasim for winning the competition and thanks to all students and to the juries for the participation to the contest. Thanks to the effort you significantly contributed to make this virtual edition of VTS more attractive for the audience.
Welcome from the chairs
On behalf of the whole VTS 2020 organizing committee:
would like to welcome you to VTS 2020 virtual conference
Due to COVID-19 we have been forced to turn VTS 2020 into a virtual conference. However, even if we miss the pleasure of the face to face interaction, thanks to the whole VTS community, we have been able to build and incredible rich program that you can see below.
Access to the program requires a valid registration. Registrations are now closed (thanks to all participants for supporting the conference). Registered users will have access for a period of 10 months to:
- Full formal proceedings
- Video presentations of all papers and sessions
- Discussion using a dedicated forum
Plenary talks
Welcome session
Regular papers
RP1 – Regular Session: ATPG & Compression
- Non-Masking Non-Robust Tests for Path Delay Faults
Irith Pomeranz (Purdue University) Presenter - Effective Design of Layout-Friendly EDT Decompressor
Yu Huang, Janusz Rajski Presenter, Mark Kassab, Nilanjan Mukherjee, Jeff Mayer (Mentor, A Siemens Business) - Input Test Data Volume Reduction Using Seed Complementation and Multiple LFSRs
Irith POMERANZ (Purdue University) Presenter
RP2 – Regular Session: Test, Reliability and Security in Emerging Application Domains
- In-field Functional Test of CAN Bus Controllers
Riccardo Cantoro, Sandro Sartoni Presenter, Matteo Sonza Reorda (Politecnico di Torino) - SNIFU: Secure Network Interception for Firmware Updates in legacy PLCs
Hadjer Benkraouda (New York University, Abu Dhabi) Presenter, Muhammad Ashif Chakkantakath, Anastasis Keliris (University of Kaiserslautern), Michail Maniatakos (New York University) - On Classification of Acceptable Images for Reliable Artificial Intelligence Systems: A Case Study on Pedestrian Detection
Tong-Yu Hsieh Presenter, Pin-Xuan WU, Chun-Chao Cheng (National Sun Yat-sen University)
RP3 – Regular Session: Emerging Technologies Test and Reliability
- ATTEST: Application-Agnostic Testing of a Novel Transistor-Level Programmable Fabric
Mustafa Shihab Presenter, Bharath Ramanidharan, Suraag Sunil Tellakula, Gaurav Rajavendra Reddy, Jingxiang Tian, Carl Sechen, Yiorgos Makris (UT Dallas) - Mitigating Read Failures in STT-MRAM
Sarath Mohanachandran Nair Presenter, Rajendra Bishnoi ISHNOI, Mehdi Tahoori (Karlsruhe Institute of Technology) - Selective Checksum based On-line Error Correction for RRAM based Matrix Operations
Abhishek Das Presenter, Nur Touba (University of Texas at Austin)
RP4 – Regular Session: Hardware Security 1
- Flush+Time: A High Accuracy and High Resolution Cache Attack On ARM-FPGA Embedded SOC
Churan Tang (The Institute of Information Engineering of Chinese Academy of Sciences), Penguin Liu (Institute of Software, Chinese Academy of Sciences), Cunquing Ma Presenter, Zongbin Liu, Jingquan Ge (The Institute of Information Engineering of Chinese Academy of Sciences) - SafeTPU: A Verifiably Secure Hardware Accelerator for Deep Neural Networks
Maria Mera Collantes Presenter, Zahra Ghodsi, Siddharth Garg (New York University) - SeRFI: Secure Remote FPGA Initialization in an Untrusted Environment
Adam Duncan (Indiana University) Presenter, Adib Nahiyan, Fahim Rahman (University of Florida), Skipper Grant, Swany Martin, Lukefahr Andrew (Indiana University), Faramandi Farimah, Mark Tehranipoor (University of Florida)
RP5 – Regular Session: Machine Learning for Testing
- A Deterministic-Statistical Multiple-Defect Diagnosis Methodology
Soumya Mittal Presenter, Shawn Blanton (Carnegie Mellon Univ.) - CNN-based Stochastic Regression for IDDQ Outlier Identification
Chun-Teng Chen, Chia-Heng Yen Presenter, Wen Cheng-Yen, Cheng-Hao Yang, Kai-Chiang Wu (National Chiao Tung University), Mason Chern, Ying-Yen Chen, Chun-Yi Kuo, Jih-Nung Lee, Shu-Yi Kao (Realtek Semiconductor Corp.), Mango Chao (National Chiao Tung University) - LSTM-based Analysis of Temporally- and Spatially-Correlated Signatures for Intermittent Fault Detection
Xingyi Wang Presenter, Li Jiang (Shanghai Jiao Tong University), Krishnendu Chakrabarty (Duke University)
RP6 – Regular Session: Defect/Fault Tolerance/Reliability
- A dynamic reconfiguration mechanism to increase the reliability of GPGPUs
Josie Rodriguez Condia Presenter, Pierpaolo Narducci, Matteo Sonza Reorda, Luca Sterpone (Politecnico di Torino) - Automated Design for Yield Through Defect Tolerance
Suriyaprakash Natarajan, Andres Malavasi, Pascal Meinerzhagen (Intel Corporation) - Aging-resilient SRAM design: an end-to-end framework
Xuan Zuo Presenter, Sandeep Gupta (University of Southern California) - Reliability Evaluation of Turbo Decoders Implemented on SRAM-FPGAs
Zhen Gao Presenter, Lingling Zhang, Ruishi Han (Tianjin University), Pedro Reviriego (Universidad Carlos III de Madrid), Zhiqiang Li (Luoyang Newvid Technology)
RP7 – Regular Session: Fault Modeling and Simulation
- ESL, Back-annotating Crosstalk Fault Models into High-level Communication Links
Katayoon Basharkhah Presenter, Rezgar Sadeghi, Nooshin Nosrati (University of Tehran), Zainalabedin Navabi (Worcester Polytechnic Institute) - Pinhole Latent Defect Modeling and Simulation for Defect-Oriented Analog/Mixed-Signal Testing
Jhon Gomez Presenter, Nektar Kama (KU Leuven), Anthony Coyette, Ronny Vanhooren, Wim Dobbelaere (ON Semiconductor), Georges Gielen (KU Leuven) - Switch Level Time Simulation of CMOS Circuits with Adaptive Voltage and Frequency Scaling
Eric Schneider Presenter, Hans-Joachim Wunderlich (Universitat Stuttgart)
RP8 – Regular Session: SoC and SiP Test
- Co-Optimization of Grid-Based TAM Wire Routing and Test Scheduling with Reconfigurable Wrappers
Jui-Hung Hung, Shih-Hsu Huang Presenter, Chun-Hua Cheng, Hsu-Yu Kao, Wei-Kai Cheng (Chung Yuan Christian University) - Dynamic Multi-Frequency Test Method for Hidden Interconnect Defects
Somayeh Sadeghi-Kohan Presenter, Sybille Hellebrand (University of Paderborn) - Internal I/O Testing: Definition and a Solution
Sreejit Chakravarty Presenter, Fei Su, Indira A Gohad, Sudheer V Bandana, B. S. Adithya, Wei Ming Lim (Intel Corporation)
RP9 – Regular Session: Hardware Security 2
- A Zero-Cost Detection Approach for Recycled ICs using Scan Architecture
Wendong Wang, Ujjwal Guin, Adit Singh (Auburn University) Presenter - DFSSD: Deep Faults and Shallow State Duality, A Provably Strong Obfuscation Solution for Circuits with Restricted Access to Scan Chain
Shervin Roshanisefat Presenter, Hadi Mardani Kamali, Kimia Zamiri Azar, Manoj Sai (George Mason University), Naghmeh Karimi (University of Maryland Baltimore County), Houman Homayoun, Avesta Sasan (George Mason University) - Taming Combinational Trojan Detection Challenges with Self-Referencing Adaptive Test Patterns
Chris Nigh Presenter, Alex Orailoglu (University of California at San Diego)
RP10 – Regular Session: ATE and BIST
- Ultra-Wideband Modulation Signal Measurement Using Local Sweep Digitizing Method
Koji Asami (ADVANTEST Laboratories Ltd.) Presenter, Keisuke Kusunoki, Nobuhiro Shimizu, Yoshiyuki Aoki (ADVANTEST Corp.) - Built-In Self-Test for Multi-Threshold NULL Convention Logic Asynchronous Circuits
Brett Sparkman (University of Arkansas) Presenter, Scott C. Smith (Texas A&M University), Jia Di (University of Arkansas) - Quantile – Quantile Fitting Approach to Detecting Site to Site Variations in Massive Multi-site Testing
Praise Farayola Presenter, Shravan Chaganti, Abdullah O. Obaidi (Iowa State University), Abalhassan Sheikh, Srivaths Ravi (Texas Instruments), Degang Chen (Iowa State University)
RP11 – Regular Session: CTC Best Papers
- A New Secure Scan Design with PUF-based Key for Authentication
Qidong Wang Presenter, Aijiao Cui (Harbin Institute of Technology), Gang Qu (University of Maryland College Park), Huawei Li (Chinese Academy of Sciences) - Sequence Triggered Hardware Trojan in Neural Network Accelerator
Zizhen Liu Presenter, Jing Ye (Chinese Academy of Sciences), Xing Hu (University of California, Santa Barbara), Huawei Li (Chinese Academy of Sciences), Xiaowei Li, Yu Hu (Chinese Academy of Sciences) - Low-Power Weighted Pseudo-Random Test Pattern Generation for Launch-on-Capture Delay Testing
Dong Xiang Presenter, Jiaming Cai, Bo Liu (Tsinghua University)
Special Sessions
- CLIC-A: Characterization of Locked Integrated Circuits via ATPG
Danielle Duvalsaint (Carnegie Mellon University)Presenter , Shawn Blanton (Carnegie Mellon University) - On The Role of Electro-Optical Probing in Breaking Logic Locking
Navid Asadi Zanjani (University of Florida) Presenter - Tampering Attacks on Logic Locked Circuits
Ayush Jain Presenter, Ujjwal Guin (Auburn University)
SS3 – Hot Topic: Emerging Memory Technologies: How is their testing different from traditional ones?
This session aims at discussing the test of emerging memories. It will highlight the difference in testing emerging memories as compared with traditional ones, discusses the failure mechanisms, appropriate fault models and test solution.
- Lightweight On-Line Test and Repair for Emerging Computation-in-Memory (CiM)
Ying Wang (Institute of Computing Technology, Chinese Academy of Sciences)Presenter - Reliability Analysis and Yield Improvement Techniques for Spintronic Memories
Mehdi Tahoori (Karlsruhe Institute of Technology)Presenter - Device Aware Test for Emerging Memories: enabling DPPB level and fast yield learning
Said Hamdioui (Delft University of Technology)Presenter
- Challenges and Rewards of Post-Quantum Cryptography Revolution: A Hardware Perspective
Kris Gaj (George Mason University) Presenter - Power, Area, Speed and Security (PASS) Trade-offs of Post-Quantum Cryptography
Kanad Basu (UT Dallas) Presenter - Low-Complexity Implementation of Binary Ring-LWE based PQC on Hardware Platform
Jiafeng Xie (Villanova University) Presenter
- A motivational history of test point architectures
Vishwani Agrawal (Auburn University) Presenter - Test point insertion algorithms
Spencer Millican (Auburn University) Presenter - Computational, parametric, and security challenges of modern test point insertion
Spencer Millican (Auburn University) Presenter
IP Sessions
- The Solution of Testing Milli-Meter-Wave ICs (76- to 81- GHz) Without Expensive Instruments
Takeshi Iwasaki (ASAHI KASEI MICRODEVICES Corp.) Presenter - On-Chip Delay Measurement for In-Field Test
Masao Aso Presenter, Haruji Futami, Satoshi Matsunaga (PRIVATECH Inc.), Yousuke Miyake, Takaaki Kato, Seiji Kajihara (Kyushu Institute of Technology), Yukiya Miura (Tokyo Metropolitan University) - Power Control of At-Speed Scan Test for IR Violation Reduction
Smith Lai Presenter, Gavin Hung, Harry H. Chen (MediaTek)
- Application Of Innovative Heterogenous Integration Technology To Develop Fine Pitch Space Transformer For VLSI Testing
Dyi-Chung Hu Presenter, Hirohito Hashimoto (SiPlus Co.) - Test System Parametric Yield Prediction Using Machine Learning Techniques
Li-Fong Tseng(NXP Semiconductor Taiwan Ltd.) Presenter, Katherine Shu-Min Li (National Sun Yat-Sen University, Taiwan) - Analysis of the Spatial Pattern Randomness for the Wafer Map Benchmarks
Sean Y.-S. Chen (Chung Yuan Christian University) Presenter, Clark Liu (Powertech Technology Inc.)
- Challenges to Screening Early Life Failures with the Current Aggressive VLSI Scaling Roadmaps
Michale Fahy (Intel Corporation) Presenter - Telemetry for Reliability and Dependability Considerations for IoT Safety Critical Platforms
Jyotika Athavale (Intel Corporation) Presenter
- Developing a Security Strategy From Threat Modeling to Pre-silicon Verification
Nicole Fern (Tortuga Logic) Presenter - Is EDA ready for design for security and security validation challenges?
Sohrab Aftabjahani (Intel Corporation) Presenter - IP Security Risk Assessment at Synopsys – Lessons Learned from 40 SRAs
Mike Borza (Synopsys) Presenter
Students activities
TTTC’s E. J. McCluskey Doctoral Thesis Presentations 1
- Assuring Security and Reliability of Emerging Non-Volatile Memories
Mohammad Nasim Imtiaz Khan (The Pennsylvania State University) Presenter - Learning Enhanced Diagnosis of Logic Circuit Failures
Soumya Mittal (Carnegie Mellon University) Presenter - Scalable Functional Validation of Next Generation SoCs
Debjit Pal (University of Illinois at Urbana-Champaign) Presenter - Machine Learning-Based Hotspot Detection: Fallacies, Pitfalls and Marching Orders
Gaurav Rajavendra Reddy (The University of Texas at Dallas) Presenter - Secure and Trustworthy Biochip Cyberphysical Systems
Mohammed Shayan (New York University) Presenter - On-Die Learning: A Pathway to Post-Deployment Robustness and Trustworthiness of Analog/RF ICs
Georgios Volanis (The University of Texas at Dallas) Presenter - Energy Efficient and Reliable Deep Learning Accelerator Design
Jeff (Jun) Zhang (New York University) Presenter