Pre-Silicon Verification Perspective

Gil Shurek and Allon Adir
(IBM Research Division, Israel)

ABSTRACT: Pre-silicon functional verification techniques provide excellent dynamic observability, and static analysis of design models can dramatically increase coverage in limited areas. Yet, only a tiny fraction of the huge reachable state-space can be sampled and verified. Although substantial effort is invested in controlling and intelligently directing the verification resources, state-of-the-art pre-silicon techniques cannot cope with the increasing complexity of modern high-end designs. More bugs escape into the silicon. Should we reset our quality expectation from the pre-silicon design? Can we better exploit silicon-casting samples as yet another verification platform? Which pre-silicon verification methodologies can be adapted to silicon? In this talk we will discuss trade-offs between the different platforms and will point out opportunities to bridge methodologies. We will describe an architecture of a pre-silicon test generator that can be successfully adapted to silicon exercisers, to enable systematic implementation of functional-coverage oriented verification plans.